This invention relates to the protection of power transistors in both discrete and power integrated circuit (PIC) or intelligent power switch (IPS) applications. More particularly, the invention relates to protecting such power transistors from damage due to loss of bias current or loss of a ground connection in control circuitry associated with the power transistor.
PIC or IPS devices are presently utilized in a wide variety of industrial applications, including automotive, lighting and motor control circuits. In many of these applications, the power transistor which supplies the load must handle substantial currents and/or voltages. Under such conditions, various circuit malfunctions, such as the loss of bias current or loss of a ground connection in associated control circuitry, may cause the power transistor to be damaged or even destroyed. Accordingly, continuing efforts have been directed towards devising simple and reliable techniques for protecting both discrete and integrated power transistors against these malfunctions.
An intelligent power switch for use in automotive applications and having a 60 volt and 10 ampere drive capability is described in "Design of a 60-V 10-A Intelligent Power Switch Using Standard Cells", IEEE Journal of Solid-State Circuits, Vol. 27, No. 3, pp. 429-432, March, 1992, by S. L. Wong et al. In FIG. 3 of that paper, there is shown an MOS power transistor configured as a high-side power switch, with gate control circuitry (including a charge pump) coupled to the gate of the transistor, and a second MOS transistor connected between the gate and source of the power transistor to short out its gate-to-source voltage to shut off and thereby protect the power transistor in case of malfunction, although no specific circuitry for this purpose is disclosed. The purpose of the charge pump in the gate control circuit is to provide a gate voltage to the MOS power transistor which is higher than the power supply voltage, thus ensuring that the output at the source of this transistor will be as close as possible to the power supply voltage. However, this creates a potential problem in activating the protection transistor in the event of a circuit failure when the power transistor is activated.
An example of a specific gate disable circuit for use with a high-side power transistor is shown in European Patent No. 0239862. In the circuit disclosed in that reference, the transistor (T2) used for shorting out the gate-to-source voltage of power transistor (T1) is a depletion-mode transistor with its gate G connected directly to ground at terminal 5. As long as the ground connection is maintained, depletion-mode transistor T2 will be in the "off" state, thus permitting normal operation of power transistor T1. If the ground connection at terminal 5 is lost, however, transistor T2, being a depletion-mode transistor will turn "on", thus providing a gate-to-source short across T1 and thereby protecting this transistor from damage that might otherwise occur due to the loss of the ground connection. However, since the gate of transistor 2 is permanently connected to ground during normal operation, this transistor cannot be activated to provide protection for the power transistor in the event of a failure mode other than loss of ground, and this transistor also cannot serve as a standby-mode disable for the power transistor. Furthermore, the provision of a depletion-mode transistor in addition to enhancement-mode transistors in the same integrated circuit results in additional complication and expense in the fabrication process.
Accordingly, it would be desirable to have a disable circuit for the control electrode of a power transistor which avoids the use of a depletion-mode transistor and is thus simpler and more economical to manufacture. Additionally, the circuit should be responsive to more than one failure mode, and should be capable of turning off the power transistor even if both of the main terminals of that transistor are very close to the power supply voltage.